1. Field of the Invention
The present invention generally relates to resistor transistor logic (RTL) circuitry and, more particularly, to a noise immune non-threshold logic (NTL) circuit utilizing NOR logic.
2. Description of the Prior Art
The prior art is replete with various types of voltage comparators and threshold level setting schemes, but invariably these circuits suffer from very poor AC noise tolerance, very low DC gain and relatively slow switching times. Most of these circuits utilize PNP bipolar transistor and field effect transistor (FET) devices in various configurations of schmitt triggers or differential comparators to effect some desired logic function.